A fnordlicht compatible controller for LED strips
Welcome to my personal website! My name is Steffen Vogel, I am a German EECS student at the RWTH Aachen University with interests in reconfigurable & high performance computing and their application in the fields of real-time simulation.
On this site you can find my extended resumé, contact information as well as my contributions to various open source projects and scientific publications.
Starting a Ph.D. in the ICT4Energy team of the Institute.
Advisor: Prof. Dr.-Ing. Antonello Monti
During this five month-long internship in OPAL-RT's eFPGAsim team, I worked extensively with MATLAB Simulink and Xilinx tools to implement FPGA-based solvers for power electronics simulation.
Implementing real-time communication tools based on RT-Linux, OPAL-RT and RTDS simulators. Supervisor: M.Sc. Marija Stevic
Undertaking exercises on system / parallel programming, x86-Assembly and more
Supervising and examination a practical course on C / C++ programming
Giving introductory lectures on micro controller programming based on the Atmel ATmega family.
 Steffen Vogel. Development of a modular and fully-digital PCIe-based interface to Real-Time Digital Simulator. Master Thesis, Grade: A+. RWTH Aachen University. August 2016.
 Steffen Vogel. Image processing and content analysis camera-based PCB analysis for solder paste dispensing. Seminar: Image Processing and Content Analysis. Institute of Imaging & Computer Vision, RWTH Aachen University, February 2015.
 Steffen Vogel. Self-referencing Page Tables for the x86-Architecture – A simple Paging Implementation for a minimalistic Operating System. Submission for ASPLOS Student Research Competition. Istanbul, Turkey, December 2014.
 Steffen Vogel. A generic memory management with paging for a minimalistic operating system. Bachelor Thesis, Grade: A+. RWTH Aachen University, Chair for Operating Systems, June 2014.
 M. Stevic, A. Estebsari, S. Vogel, E. Pons, E. Bompard, M. Masera, and A. Monti. A multi-site european framework for real-time co-simulation of power systems. IET Generation, Transmission & Distribution, June 7, 2017.
 M. Stevic, S. Vogel, M. Grigull, A. Monti, A. Estebsari, E. Pons, T. Huang, E. Bompard, Virtual integration of laboratories over long distance for real-time co-simulation of power systems. IECON 2016 – 42nd Annual Conference of the IEEE Industrial Electronics Society, Florence, 2016, pp. 6717-6721.
 E. Bompard, A. Monti, A. Tenconi, A. Estebsari, T. Huang, E. Pons, M. Stevic, S. Vaschetto, S. Vogel. A multi-site real-time co-simulation platform for the testing of control strategies of distributed storage and V2G in distribution networks. 2016 18th European Conference on Power Electronics and Applications (EPE’16 ECCE Europe), pp. 1–9, Karlsruhe, September 2016.
 JRC-IET, Politecnico di Torino, RWTH Aachen University. A European Platform for Distributed Real Time Modelling & Simulation of Emerging Electricity Systems. JRC Technical Report, Mai 2016.
 Marija Stevic, Steffen Vogel, Antonello Monti, and Salvatore D’Arco. Feasibility of geographically distributed real-time simulation of HVDC system interconnected with AC networks. IEEE Power Tech, Eindhoven, June 2015.